A large number of semiconductor chips such as ICs built in a semiconductor wafer are subjected to an electrical test as to whether or not the semiconductor chips have the performance as specified in the specifications thereof, before being cut and separated from the semiconductor wafer. In an example, such an electrical test is performed by a method of supplying inspection signals to electrodes of the semiconductor chips on the semiconductor wafer, and analyzing the detected signals.
Conventionally, in the above-described electrical test of the semiconductor chips, a probe card is used as an inspection jig, in order to electrically connect the electrodes of the semiconductor chips and an electric circuit or the like of a wiring substrate for test disposed to be spaced.
The probe card is configured with, for example, a large number of conductive probes for inspection. Patent Document 1 discloses a probe card using cantilever type probes. Patent Document 2 discloses a probe card using vertical type probes.
FIG. 7 is a diagram for schematically explaining an electrical test of semiconductor chips using a conventional probe card.
As shown in FIG. 7, a conventional probe card 1000 has a wiring substrate 1002 having a wiring 1004 and a plurality of probes 1003. The probes 1003 are, for example, cantilever type probes. Each of the probes 1003 has a needle tip part 1005 at one end portion and an attaching part 1006 at the other end portion. The probe 1003 is attached to the main surface of the wiring substrate 1002 via the attaching part 1006.
The probe card 1000 is used as an inspection jig for electrical connection to perform an inspection such as an electrical test or the like of an object to be inspected having an electrode. As shown in FIG. 7, an object to be inspected is, for example, a semiconductor chip (not shown) built in a semiconductor wafer 1015 having electrode pads 1014 of electrodes. In the electrical test of the semiconductor chips, the plurality of probes 1003 mounted on the probe card 1000 are respectively and simultaneously brought into contact with the corresponding electrode pads 1014 of the semiconductor chips of the semiconductor wafer 1015. In the electrical test of the semiconductor chips, inspection signals are transmitted and received between each of the electrode pads 1014 and each of the probes 1003.
In the case where the semiconductor chips are inspected using a conventional probe card like the probe card 1000 shown in FIG. 7, all the electrodes to be inspected of the semiconductor chips and all the probes of the probe card are required to be simultaneously brought into contact with each other.
Meanwhile, circuit dimensions required for semiconductor elements are being steadily decreased owing to the recent trend toward higher integration and larger capacity of Large Scale Integration (LSI). In an example, a pattern formation in a typical logic device is demanded with a line width of several tens nm.
Patent Document 1: Japanese Unexamined Patent Application, Publication No. 2011-099698
Patent Document 2: Japanese Unexamined Patent Application, Publication No. 2012-042329